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標(biāo)題: STM32 如何定義IO?就像51單片機(jī)中的sbit那樣 [打印本頁]

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作者: ZMRGHY    時(shí)間: 2019-1-15 21:43
標(biāo)題: STM32 如何定義IO?就像51單片機(jī)中的sbit那樣
如題

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作者: devcang    時(shí)間: 2019-1-15 23:31
兩個(gè)不同的系統(tǒng)，知識(shí)不可以直接“拿來用”

#define LED1 PB4
#define LED2 PC4
#define LED3 PC7
#define LED4 PC5

void Init_LED(void){
    /*LED 配置為推挽輸出*/
    PD_DDR |= 0X04;   //PD2輸出模式,0為輸入模式
    PD_CR1 |= 0X04;   //PD2模擬開漏輸出
    PD_CR2 &= 0XFB;   //PD2輸出速度最大為2MHZ，CR1/CR2懸浮輸入

    PC_DDR |= 0XC8;
    PC_CR1 |= 0XC8;
    PC_CR2 &= 0X27;

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作者: Angle145    時(shí)間: 2019-1-15 23:56
看我發(fā)的帖有

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作者: Angle145    時(shí)間: 2019-1-15 23:59
//舉例:       PA0_OUT;   //PA0配置成推挽輸出模式
              PA0=1;     //PA0輸出1
              ...
              PA0=0;     //PA0輸出0
              當(dāng)需要PA0改為輸入時(shí)，需要在使用前配置成輸入
                                                        PA0_IN;    //PA0配置成上下拉輸入
                                                        PA0=1;     //PA0配置成上拉輸入(PA0=0配置成下拉輸入)
                                                        if(PA0in==0) PA11=1;  //讀取PA0的電平狀態(tài)
                                                        當(dāng)PA0作為輸入使用完畢，PA0口又繼續(xù)上面的輸出工作，則重新再配置一次
                                                        PA0_OUT;   //恢復(fù)PA0為輸出
                                                        PA0=0;     //PA0輸出0
                                                       
                                                        PA_OUT;    //PA(16個(gè)IO口)配置成推挽輸出模式
                                                        PA=0xFF00; //高8位輸出1，低8位輸出0
                                                        PA_IN;     //PA(16個(gè)IO口)配置成上下拉輸入
                                                        PA=0xFFFF; //PA(16個(gè)IO口)配置成上拉輸入
                                                        PB0_OUT;   //PB0配置成推挽輸出模式
                                                        if(PAin==0xFFFF)  PB0=1;   //如果PA16個(gè)IO都等于1，則PB0置1

#define BITBAND(addr, bitnum) ((addr & 0xF0000000)+0x2000000+((addr &0xFFFFF)<<5)+(bitnum<<2))
#define MEM_ADDR(addr) *((volatile unsigned long *)(addr))
#define BIT_ADDR(addr, bitnum) MEM_ADDR(BITBAND(addr, bitnum))
#define GPIOA_ODR_Addr (GPIOA_BASE+0x0C) //0x4001080C
#define GPIOB_ODR_Addr (GPIOB_BASE+0x0C) //0x40010C0C
#define GPIOC_ODR_Addr (GPIOC_BASE+0x0C) //0x4001100C
#define GPIOD_ODR_Addr (GPIOD_BASE+0x0C) //0x4001140C
#define GPIOE_ODR_Addr (GPIOE_BASE+0x0C) //0x4001180C
#define GPIOF_ODR_Addr (GPIOF_BASE+0x0C) //0x40011808
#define GPIOG_ODR_Addr (GPIOG_BASE+0x0C) //0x40011808
#define GPIOA_IDR_Addr (GPIOA_BASE+0x08) //0x40010808
#define GPIOB_IDR_Addr (GPIOB_BASE+0x08) //0x40010C08  
#define GPIOC_IDR_Addr (GPIOC_BASE+0x08) //0x40011008
#define GPIOD_IDR_Addr (GPIOD_BASE+0x08) //0x40011408
#define GPIOE_IDR_Addr (GPIOE_BASE+0x08) //0x40011808
#define GPIOF_IDR_Addr (GPIOF_BASE+0x08) //0x40011808
#define GPIOG_IDR_Addr (GPIOG_BASE+0x08) //0x40011808
//-----------------------------------------------------

/*--------------------------------------------------------------------------------*/
#define PA0_OUT  RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xFFFFFFF0; GPIOA->CRL|=0x00000003
#define PA1_OUT  RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xFFFFFF0F; GPIOA->CRL|=0x00000030
#define PA2_OUT  RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xFFFFF0FF; GPIOA->CRL|=0x00000300
#define PA3_OUT  RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xFFFF0FFF; GPIOA->CRL|=0x00003000
#define PA4_OUT  RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xFFF0FFFF; GPIOA->CRL|=0x00030000
#define PA5_OUT  RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xFF0FFFFF; GPIOA->CRL|=0x00300000
#define PA6_OUT  RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xF0FFFFFF; GPIOA->CRL|=0x03000000
#define PA7_OUT  RCC->APB2ENR|=1<<2;GPIOA->CRL&=0x0FFFFFFF; GPIOA->CRL|=0x30000000
#define PA8_OUT  RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xFFFFFFF0; GPIOA->CRH|=0x00000003
#define PA9_OUT  RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xFFFFFF0F; GPIOA->CRH|=0x00000030
#define PA10_OUT RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xFFFFF0FF; GPIOA->CRH|=0x00000300
#define PA11_OUT RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xFFFF0FFF; GPIOA->CRH|=0x00003000
#define PA12_OUT RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xFFF0FFFF; GPIOA->CRH|=0x00030000
#define PA13_OUT RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xFF0FFFFF; GPIOA->CRH|=0x00300000
#define PA14_OUT RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xF0FFFFFF; GPIOA->CRH|=0x03000000
#define PA15_OUT RCC->APB2ENR|=1<<2;GPIOA->CRH&=0x0FFFFFFF; GPIOA->CRH|=0x30000000
#define PA0_IN   RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xFFFFFFF0; GPIOA->CRL|=0x00000008
#define PA1_IN   RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xFFFFFF0F; GPIOA->CRL|=0x00000080
#define PA2_IN   RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xFFFFF0FF; GPIOA->CRL|=0x00000800
#define PA3_IN   RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xFFFF0FFF; GPIOA->CRL|=0x00008000
#define PA4_IN   RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xFFF0FFFF; GPIOA->CRL|=0x00080000
#define PA5_IN   RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xFF0FFFFF; GPIOA->CRL|=0x00800000
#define PA6_IN   RCC->APB2ENR|=1<<2;GPIOA->CRL&=0xF0FFFFFF; GPIOA->CRL|=0x08000000
#define PA7_IN   RCC->APB2ENR|=1<<2;GPIOA->CRL&=0x0FFFFFFF; GPIOA->CRL|=0x80000000
#define PA8_IN   RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xFFFFFFF0; GPIOA->CRH|=0x00000008
#define PA9_IN   RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xFFFFFF0F; GPIOA->CRH|=0x00000080
#define PA10_IN  RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xFFFFF0FF; GPIOA->CRH|=0x00000800
#define PA11_IN  RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xFFFF0FFF; GPIOA->CRH|=0x00008000
#define PA12_IN  RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xFFF0FFFF; GPIOA->CRH|=0x00080000
#define PA13_IN  RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xFF0FFFFF; GPIOA->CRH|=0x00800000
#define PA14_IN  RCC->APB2ENR|=1<<2;GPIOA->CRH&=0xF0FFFFFF; GPIOA->CRH|=0x08000000
#define PA15_IN  RCC->APB2ENR|=1<<2;GPIOA->CRH&=0x0FFFFFFF; GPIOA->CRH|=0x80000000
//-----------------------------------------------------
#define PB0_OUT  RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xFFFFFFF0; GPIOB->CRL|=0x00000003
#define PB1_OUT  RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xFFFFFF0F; GPIOB->CRL|=0x00000030
#define PB2_OUT  RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xFFFFF0FF; GPIOB->CRL|=0x00000300
#define PB3_OUT  RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xFFFF0FFF; GPIOB->CRL|=0x00003000
#define PB4_OUT  RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xFFF0FFFF; GPIOB->CRL|=0x00030000
#define PB5_OUT  RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xFF0FFFFF; GPIOB->CRL|=0x00300000
#define PB6_OUT  RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xF0FFFFFF; GPIOB->CRL|=0x03000000
#define PB7_OUT  RCC->APB2ENR|=1<<3;GPIOB->CRL&=0x0FFFFFFF; GPIOB->CRL|=0x30000000
#define PB8_OUT  RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xFFFFFFF0; GPIOB->CRH|=0x00000003
#define PB9_OUT  RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xFFFFFF0F; GPIOB->CRH|=0x00000030
#define PB10_OUT RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xFFFFF0FF; GPIOB->CRH|=0x00000300
#define PB11_OUT RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xFFFF0FFF; GPIOB->CRH|=0x00003000
#define PB12_OUT RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xFFF0FFFF; GPIOB->CRH|=0x00030000
#define PB13_OUT RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xFF0FFFFF; GPIOB->CRH|=0x00300000
#define PB14_OUT RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xF0FFFFFF; GPIOB->CRH|=0x03000000
#define PB15_OUT RCC->APB2ENR|=1<<3;GPIOB->CRH&=0x0FFFFFFF; GPIOB->CRH|=0x30000000
#define PB0_IN   RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xFFFFFFF0; GPIOB->CRL|=0x00000008
#define PB1_IN   RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xFFFFFF0F; GPIOB->CRL|=0x00000080
#define PB2_IN   RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xFFFFF0FF; GPIOB->CRL|=0x00000800
#define PB3_IN   RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xFFFF0FFF; GPIOB->CRL|=0x00008000
#define PB4_IN   RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xFFF0FFFF; GPIOB->CRL|=0x00080000
#define PB5_IN   RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xFF0FFFFF; GPIOB->CRL|=0x00800000
#define PB6_IN   RCC->APB2ENR|=1<<3;GPIOB->CRL&=0xF0FFFFFF; GPIOB->CRL|=0x08000000
#define PB7_IN   RCC->APB2ENR|=1<<3;GPIOB->CRL&=0x0FFFFFFF; GPIOB->CRL|=0x80000000
#define PB8_IN   RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xFFFFFFF0; GPIOB->CRH|=0x00000008
#define PB9_IN   RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xFFFFFF0F; GPIOB->CRH|=0x00000080
#define PB10_IN  RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xFFFFF0FF; GPIOB->CRH|=0x00000800
#define PB11_IN  RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xFFFF0FFF; GPIOB->CRH|=0x00008000
#define PB12_IN  RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xFFF0FFFF; GPIOB->CRH|=0x00080000
#define PB13_IN  RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xFF0FFFFF; GPIOB->CRH|=0x00800000
#define PB14_IN  RCC->APB2ENR|=1<<3;GPIOB->CRH&=0xF0FFFFFF; GPIOB->CRH|=0x08000000
#define PB15_IN  RCC->APB2ENR|=1<<3;GPIOB->CRH&=0x0FFFFFFF; GPIOB->CRH|=0x80000000


#define PA0    BIT_ADDR(GPIOA_ODR_Addr, 0) //輸出
#define PA1    BIT_ADDR(GPIOA_ODR_Addr, 1) //輸出
#define PA2    BIT_ADDR(GPIOA_ODR_Addr, 2) //輸出
#define PA3    BIT_ADDR(GPIOA_ODR_Addr, 3) //輸出
#define PA4    BIT_ADDR(GPIOA_ODR_Addr, 4) //輸出
#define PA5    BIT_ADDR(GPIOA_ODR_Addr, 5) //輸出
#define PA6    BIT_ADDR(GPIOA_ODR_Addr, 6) //輸出
#define PA7    BIT_ADDR(GPIOA_ODR_Addr, 7) //輸出
#define PA8    BIT_ADDR(GPIOA_ODR_Addr, 8) //輸出
#define PA9    BIT_ADDR(GPIOA_ODR_Addr, 9) //輸出
#define PA10   BIT_ADDR(GPIOA_ODR_Addr, 10) //輸出
#define PA11   BIT_ADDR(GPIOA_ODR_Addr, 11) //輸出
#define PA12   BIT_ADDR(GPIOA_ODR_Addr, 12) //輸出
#define PA13   BIT_ADDR(GPIOA_ODR_Addr, 13) //輸出
#define PA14   BIT_ADDR(GPIOA_ODR_Addr, 14) //輸出
#define PA15   BIT_ADDR(GPIOA_ODR_Addr, 15) //輸出
#define PA0in  BIT_ADDR(GPIOA_IDR_Addr, 0) //輸入
#define PA1in  BIT_ADDR(GPIOA_IDR_Addr, 1) //輸入
#define PA2in  BIT_ADDR(GPIOA_IDR_Addr, 2) //輸入
#define PA3in  BIT_ADDR(GPIOA_IDR_Addr, 3) //輸入
#define PA4in  BIT_ADDR(GPIOA_IDR_Addr, 4) //輸入
#define PA5in  BIT_ADDR(GPIOA_IDR_Addr, 5) //輸入
#define PA6in  BIT_ADDR(GPIOA_IDR_Addr, 6) //輸入
#define PA7in  BIT_ADDR(GPIOA_IDR_Addr, 7) //輸入
#define PA8in  BIT_ADDR(GPIOA_IDR_Addr, 8) //輸入
#define PA9in  BIT_ADDR(GPIOA_IDR_Addr, 9) //輸入
#define PA10in BIT_ADDR(GPIOA_IDR_Addr, 10) //輸入
#define PA11in BIT_ADDR(GPIOA_IDR_Addr, 11) //輸入
#define PA12in BIT_ADDR(GPIOA_IDR_Addr, 12) //輸入
#define PA13in BIT_ADDR(GPIOA_IDR_Addr, 13) //輸入
#define PA14in BIT_ADDR(GPIOA_IDR_Addr, 14) //輸入
#define PA15in BIT_ADDR(GPIOA_IDR_Addr, 15) //輸入
//-------------
#define PB0    BIT_ADDR(GPIOB_ODR_Addr, 0) //輸出
#define PB1    BIT_ADDR(GPIOB_ODR_Addr, 1) //輸出
#define PB2    BIT_ADDR(GPIOB_ODR_Addr, 2) //輸出
#define PB3    BIT_ADDR(GPIOB_ODR_Addr, 3) //輸出
#define PB4    BIT_ADDR(GPIOB_ODR_Addr, 4) //輸出
#define PB5    BIT_ADDR(GPIOB_ODR_Addr, 5) //輸出
#define PB6    BIT_ADDR(GPIOB_ODR_Addr, 6) //輸出
#define PB7    BIT_ADDR(GPIOB_ODR_Addr, 7) //輸出
#define PB8    BIT_ADDR(GPIOB_ODR_Addr, 8) //輸出
#define PB9    BIT_ADDR(GPIOB_ODR_Addr, 9) //輸出
#define PB10   BIT_ADDR(GPIOB_ODR_Addr, 10) //輸出
#define PB11   BIT_ADDR(GPIOB_ODR_Addr, 11) //輸出
#define PB12   BIT_ADDR(GPIOB_ODR_Addr, 12) //輸出
#define PB13   BIT_ADDR(GPIOB_ODR_Addr, 13) //輸出
#define PB14   BIT_ADDR(GPIOB_ODR_Addr, 14) //輸出
#define PB15   BIT_ADDR(GPIOB_ODR_Addr, 15) //輸出
#define PB0in  BIT_ADDR(GPIOB_IDR_Addr, 0) //輸入
#define PB1in  BIT_ADDR(GPIOB_IDR_Addr, 1) //輸入
#define PB2in  BIT_ADDR(GPIOB_IDR_Addr, 2) //輸入
#define PB3in  BIT_ADDR(GPIOB_IDR_Addr, 3) //輸入
#define PB4in  BIT_ADDR(GPIOB_IDR_Addr, 4) //輸入
#define PB5in  BIT_ADDR(GPIOB_IDR_Addr, 5) //輸入
#define PB6in  BIT_ADDR(GPIOB_IDR_Addr, 6) //輸入
#define PB7in  BIT_ADDR(GPIOB_IDR_Addr, 7) //輸入
#define PB8in  BIT_ADDR(GPIOB_IDR_Addr, 8) //輸入
#define PB9in  BIT_ADDR(GPIOB_IDR_Addr, 9) //輸入
#define PB10in BIT_ADDR(GPIOB_IDR_Addr, 10) //輸入
#define PB11in BIT_ADDR(GPIOB_IDR_Addr, 11) //輸入
#define PB12in BIT_ADDR(GPIOB_IDR_Addr, 12) //輸入
#define PB13in BIT_ADDR(GPIOB_IDR_Addr, 13) //輸入
#define PB14in BIT_ADDR(GPIOB_IDR_Addr, 14) //輸入
#define PB15in BIT_ADDR(GPIOB_IDR_Addr, 15) //輸入

#define PA   MEM_ADDR(GPIOA_ODR_Addr)          //PA  16個(gè)IO口同時(shí)動(dòng)作
#define PB   MEM_ADDR(GPIOB_ODR_Addr)
#define PAin MEM_ADDR(GPIOA_IDR_Addr)
#define PBin MEM_ADDR(GPIOB_IDR_Addr)

想要完整的去下我的那個(gè)stm32多任務(wù)+仿51的那個(gè)

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作者: yzwzfyz    時(shí)間: 2019-1-16 08:05
為何不查一下手冊(cè)呢？

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作者: 周超然    時(shí)間: 2019-1-16 08:44
先要io口初始化，這個(gè)比51多一步，用庫函數(shù)的程序
類似這樣
#define LED_ON               GPIO_SetBits(PA_port,GPIO_Pin)       
例程代碼很多的

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作者: 璀璨星芒    時(shí)間: 2019-1-16 19:43
#define KEY0        PEin(4) //將PE4口定義為KEY0，這個(gè)就是端口位定義的代碼，但是每一個(gè)端口都是需要配置的，不論是時(shí)鐘還是輸入輸出模式亦或者是速率以及上下拉模式，都是需要配置。去看STM32寄存器開發(fā)手冊(cè)吧。

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