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標(biāo)題: VERILONG串口單秒發(fā)數(shù)據(jù)簡(jiǎn)單實(shí)例 [打印本頁(yè)]

作者: nmgbtzyf 時(shí)間: 2024-12-24 10:37
標(biāo)題: VERILONG串口單秒發(fā)數(shù)據(jù)簡(jiǎn)單實(shí)例
/*+++++++TOP++++++++++++*/

module uart_tx(
input             wire          sclk,
      input             wire                rst_n,
      output             reg       uart_tx
);

parameter                CLK_FREQ          =24000000;       //時(shí)鐘頻率50M
parameter                UART_BAUD          = 115200;       //時(shí)鐘頻率50M
parameter                MAX_BIT_COUNT       = 31;       //時(shí)鐘頻率50M
localparam                MAX_BAUD_CNT       = CLK_FREQ / UART_BAUD;//434

reg [7:0] write_data; //發(fā)送數(shù)據(jù)

//運(yùn)行計(jì)數(shù)器
reg [31:0] run_cnt;       //波特率計(jì)數(shù)器
always @(posedge sclk or negedge rst_n)
begin
if(rst_n == 1'b0)
      run_cnt <= 32'd0;
else if(run_cnt == CLK_FREQ)
      run_cnt <= 0;
else
      run_cnt <= run_cnt + 1;
end

//波特率計(jì)數(shù)器
reg [8:0] baud_cnt;       //波特率計(jì)數(shù)器
reg en_baud_cnt;       //波特率計(jì)數(shù)器開(kāi)關(guān)
always @(posedge sclk or negedge rst_n)
begin
if(rst_n == 1'b0)
      baud_cnt <= 8'd0;
else if(en_baud_cnt == 1'b1) begin
      if(baud_cnt == MAX_BAUD_CNT)
         baud_cnt <= 8'd0;
      else
         baud_cnt <= baud_cnt + 1;
end
else
      baud_cnt <= baud_cnt;
end

//發(fā)送位計(jì)數(shù)器
reg [4:0] bit_cnt = 0;       //波特率計(jì)數(shù)器
always @(posedge sclk or negedge rst_n)
begin
if(rst_n == 1'b0)
      bit_cnt <= 4'd0;
else if(baud_cnt == MAX_BAUD_CNT)
      begin
         if(bit_cnt ==  MAX_BIT_COUNT)
            bit_cnt <= 4'd0;
         else
            bit_cnt <= bit_cnt + 1;
      end
else
      bit_cnt <= bit_cnt;
end

//位發(fā)送邏輯
always @(posedge sclk or negedge rst_n)
begin
if(rst_n == 1'b0)
      uart_tx <= 1'b0;
else if(baud_cnt == MAX_BAUD_CNT/2)
      begin
         if(bit_cnt ==  0)
            uart_tx <= 1'b0;
         else if(bit_cnt == MAX_BIT_COUNT)
            uart_tx <= 1'b1;
         else
         begin
         case(bit_cnt)
            1:uart_tx <= write_data[0];
            2:uart_tx <= write_data[1];
            3:uart_tx <= write_data[2];
            4:uart_tx <= write_data[3];
            5:uart_tx <= write_data[4];
            6:uart_tx <= write_data[5];
            7:uart_tx <= write_data[6];
            8:uart_tx <= write_data[7];
            default:uart_tx <= uart_tx;
         endcase
         end
         //uart_tx <= write_data[bit_cnt-1];
      end
else
      uart_tx <= uart_tx;
end

always @(posedge sclk or negedge rst_n)
begin
if(rst_n == 1'b0)
      en_baud_cnt <= 1'b0;
else if(run_cnt == 0) begin
      en_baud_cnt <= 1'b1;
end
else if(bit_cnt ==  MAX_BIT_COUNT && baud_cnt == MAX_BAUD_CNT)
      en_baud_cnt <= 1'b0;
else
      en_baud_cnt <= en_baud_cnt;
end

always @(posedge sclk or negedge rst_n)
begin
if(rst_n == 1'b0)
      write_data <= 8'd0;
else if(run_cnt == 0)
      write_data <= write_data + 1;
else
      write_data <= write_data;
end

endmodule

畫(huà)紅線的一個(gè)小問(wèn)題，有沒(méi)有人幫我解釋一下？
寄存器是八位的最大數(shù)值255

但是
MAX_BAUD_CNT數(shù)值是434這個(gè)應(yīng)該怎么理解？

IMG_20241224_212921.jpg (324.31 KB, 下載次數(shù): 0)

作者: tyrl800 時(shí)間: 2024-12-25 17:00
reg [8:0] baud_cnt;是9位

作者: nmgbtzyf 時(shí)間: 2024-12-26 18:32
對(duì)對(duì)對(duì) 我，low 真是一起語(yǔ)醒夢(mèng)中人謝謝

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