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/****************************************************************************
* $Id:: i2cslave.c 3635 2010-06-02 00:31:46Z usb00423 $
* Project: NXP LPC11xx I2C Slave example
*
* Description:
* This file contains I2C slave code example which include I2C slave
* initialization, I2C slave interrupt handler, and APIs for I2C slave
* access.
*
****************************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
****************************************************************************/
#include "LPC11xx.h"/* LPC11xx Peripheral Registers */
#include "type.h"
#include "i2cslave.h"
volatile uint32_t I2CMasterState = I2C_IDLE;
volatile uint32_t I2CSlaveState = I2C_IDLE;
volatile uint32_t I2CMode;
volatile uint8_t I2CWrBuffer[BUFSIZE];
volatile uint8_t I2CRdBuffer[BUFSIZE];
volatile uint32_t I2CReadLength;
volatile uint32_t I2CWriteLength;
volatile uint32_t RdIndex = 0;
volatile uint32_t WrIndex = 0;
/*
From device to device, the I2C communication protocol may vary,
in the example below, the protocol uses repeated start to read data from or
write to the device:
For master read: the sequence is: STA,Addr(W),offset,RE-STA,Addr(r),data...STO
for master write: the sequence is: STA,Addr(W),offset,RE-STA,Addr(w),data...STO
Thus, in state 8, the address is always WRITE. in state 10, the address could
be READ or WRITE depending on the I2C command.
*/
/*****************************************************************************
** Function name:I2C_IRQHandler
**
** Descriptions:I2C interrupt handler, deal with master mode only.
**
** parameters:None
** Returned value:None
**
*****************************************************************************/
void I2C_IRQHandler(void)
{
uint8_t StatValue;
/* this handler deals with master read and master write only */
StatValue = LPC_I2C->STAT;
switch ( StatValue )
{
case 0x60:/* An own SLA_W has been received. */
case 0x68:
RdIndex = 0;
LPC_I2C->CONSET = I2CONSET_AA;/* assert ACK after SLV_W is received */
LPC_I2C->CONCLR = I2CONCLR_SIC;
I2CSlaveState = I2C_WR_STARTED;
break;
case 0x80:/* data receive */
case 0x90:
if ( I2CSlaveState == I2C_WR_STARTED )
{
I2CRdBuffer[RdIndex++] = LPC_I2C->DAT;
LPC_I2C->CONSET = I2CONSET_AA;/* assert ACK after data is received */
}
else
{
LPC_I2C->CONCLR = I2CONCLR_AAC;/* assert NACK */
}
LPC_I2C->CONCLR = I2CONCLR_SIC;
break;
case 0xA8:/* An own SLA_R has been received. */
case 0xB0:
RdIndex = 0;
LPC_I2C->CONSET = I2CONSET_AA;/* assert ACK after SLV_R is received */
LPC_I2C->CONCLR = I2CONCLR_SIC;
I2CSlaveState = I2C_RD_STARTED;
WrIndex = I2CRdBuffer[0];/* The 1st byte is the index. */
break;
case 0xB8:/* Data byte has been transmitted */
case 0xC8:
if ( I2CSlaveState == I2C_RD_STARTED )
{
LPC_I2C->DAT = I2CRdBuffer[WrIndex+1];/* write the same data back to master */
WrIndex++;/* Need to skip the index byte in RdBuffer */
LPC_I2C->CONSET = I2CONSET_AA;/* assert ACK */
}
else
{
LPC_I2C->CONCLR = I2CONCLR_AAC;/* assert NACK */
}
LPC_I2C->CONCLR = I2CONCLR_SIC;
break;
case 0xC0:/* Data byte has been transmitted, NACK */
LPC_I2C->CONCLR = I2CONCLR_AAC;/* assert NACK */
LPC_I2C->CONCLR = I2CONCLR_SIC;
I2CSlaveState = DATA_NACK;
break;
case 0xA0:/* Stop condition or repeated start has */
LPC_I2C->CONSET = I2CONSET_AA;/* been received, assert ACK. */
LPC_I2C->CONCLR = I2CONCLR_SIC;
I2CSlaveState = I2C_IDLE;
break;
default:
LPC_I2C->CONCLR = I2CONCLR_SIC;
LPC_I2C->CONSET = I2CONSET_I2EN | I2CONSET_SI;
break;
}
return;
}
/*****************************************************************************
** Function name:I2CSlaveInit
**
** Descriptions:Initialize I2C controller
**
** parameters:I2c mode is either MASTER or SLAVE
** Returned value:true or false, return false if the I2C
**interrupt handler was not installed correctly
**
*****************************************************************************/
void I2CSlaveInit( void )
{
/* SSP and I2C reset are overlapped, a known bug,
for now, both SSP and I2C use bit 0 for reset enable.
Once the problem is fixed, change to "#if 1". */
#if 1
LPC_SYSCON->PRESETCTRL |= (0x1<<1);
#else
LPC_SYSCON->PRESETCTRL |= (0x1<<0);
#endif
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<5);
LPC_IOCON->PIO0_4 &= ~0x3F;/* I2C I/O config */
LPC_IOCON->PIO0_4 |= 0x01;/* I2C SCL */
LPC_IOCON->PIO0_5 &= ~0x3F;
LPC_IOCON->PIO0_5 |= 0x01;/* I2C SDA */
/*--- Clear flags ---*/
LPC_I2C->CONCLR = I2CONCLR_AAC | I2CONCLR_SIC | I2CONCLR_STAC | I2CONCLR_I2ENC;
/*--- Reset registers ---*/
#if FAST_MODE_PLUS
LPC_IOCON->PIO0_4 |= (0x1<<9);
LPC_IOCON->PIO0_5 |= (0x1<<9);
LPC_I2C->SCLL = I2SCLL_HS_SCLL;
LPC_I2C->SCLH = I2SCLH_HS_SCLH;
#else
LPC_I2C->SCLL = I2SCLL_SCLL;
LPC_I2C->SCLH = I2SCLH_SCLH;
#endif
LPC_I2C->ADR0 = PCF8594_ADDR;
I2CSlaveState = I2C_IDLE;
/* Enable the I2C Interrupt */
NVIC_EnableIRQ(I2C_IRQn);
LPC_I2C->CONSET = I2CONSET_I2EN | I2CONSET_SI;
return;
}
/******************************************************************************
** End Of File
******************************************************************************/
/****************************************************************************
* $Id:: i2cslave.h 3635 2010-06-02 00:31:46Z usb00423 $
* Project: NXP LPC11xx I2C Slave example
*
* Description:
* This file contains I2C slave code header definition.
*
****************************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
****************************************************************************/
#ifndef __I2CSLAVE_H
#define __I2CSLAVE_H
#define FAST_MODE_PLUS 1
#define BUFSIZE 6
#define MAX_TIMEOUT 0x00FFFFFF
#define PCF8594_ADDR 0xA0
#define READ_WRITE 0x01
#define RD_BIT 0x01
#define I2C_IDLE 0
#define I2C_STARTED 1
#define I2C_RESTARTED 2
#define I2C_REPEATED_START 3
#define DATA_ACK 4
#define DATA_NACK 5
#define I2C_WR_STARTED 6
#define I2C_RD_STARTED 7
#define I2CONSET_I2EN (0x1<<6) /* I2C Control Set Register */
#define I2CONSET_AA (0x1<<2)
#define I2CONSET_SI (0x1<<3)
#define I2CONSET_STO (0x1<<4)
#define I2CONSET_STA (0x1<<5)
#define I2CONCLR_AAC (0x1<<2) /* I2C Control clear Register */
#define I2CONCLR_SIC (0x1<<3)
#define I2CONCLR_STAC (0x1<<5)
#define I2CONCLR_I2ENC (0x1<<6)
#define I2DAT_I2C 0x00000000 /* I2C Data Reg */
#define I2ADR_I2C 0x00000000 /* I2C Slave Address Reg */
#define I2SCLH_SCLH 0x00000180 /* I2C SCL Duty Cycle High Reg */
#define I2SCLL_SCLL 0x00000180 /* I2C SCL Duty Cycle Low Reg */
#define I2SCLH_HS_SCLH 0x00000020 /* Fast Plus I2C SCL Duty Cycle High Reg */
#define I2SCLL_HS_SCLL 0x00000020 /* Fast Plus I2C SCL Duty Cycle Low Reg */
extern void I2C_IRQHandler( void );
extern void I2CSlaveInit( void );
#endif /* end __I2CSLAVE_H */
/****************************************************************************
** End Of File
*****************************************************************************/
/****************************************************************************
* $Id:: i2cslvtst.c 3635 2010-06-02 00:31:46Z usb00423 $
* Project: NXP LPC11xx I2C example
*
* Description:
* This file contains I2C slave test modules, main entry, to test I2C
* slave APIs.
*
****************************************************************************
* Software that is described herein is for illustrative purposes only
* which provides customers with programming information regarding the
* products. This software is supplied "AS IS" without any warranties.
* NXP Semiconductors assumes no responsibility or liability for the
* use of the software, conveys no license or title under any patent,
* copyright, or mask work right to the product. NXP Semiconductors
* reserves the right to make changes in the software without
* notification. NXP Semiconductors also make no representation or
* warranty that such application will be suitable for the specified
* use without further testing or modification.
****************************************************************************/
#include "LPC11xx.h"/* LPC11xx Peripheral Registers */
#include "type.h"
#include "i2cslave.h"
extern volatile uint8_t I2CWrBuffer[BUFSIZE];
extern volatile uint8_t I2CRdBuffer[BUFSIZE];
extern volatile uint32_t I2CSlaveState;
extern volatile uint32_t I2CReadLength, I2CWriteLength;
/*******************************************************************************
** Main Function main()
*******************************************************************************/
int main (void)
{
uint32_t i;
SystemInit();
for ( i = 0; i < BUFSIZE; i++ )
{
I2CRdBuffer[i] = 0x00;
}
I2CSlaveInit();/* initialize I2c */
/* When the NACK occurs, the master has stopped the
communication. Just check the content of I2CRd/WrBuffer. */
while ( I2CSlaveState != DATA_NACK );
return 0;
}
/******************************************************************************
** End Of File
******************************************************************************/

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