LNA design for CDMA front end

ID:273791 · 發(fā)表于 2018-1-9 15:12

This article will step the reader through a practical design of a front end 900
MHz and 1.9 GHz CDMA Low Noise Amplifier. The main emphasis will be put on
Noise Figure, IP3, Gain and power dissipation trade offs.
The main topics of the article will include the following:
• Bias design
• Circuit stabilization
• Noise optimization
• Linearity optimization
• Load pull for gain and IP3 trade off improvement
• Complete circuit characterization
The LNA design will be carried out with a discrete, 5th generation silicon transistor from
Philips Semiconductors. A circuit solution will be presented along with complete
measured performance that is required by 900MHz and 1.9 GHz CDMA systems.
Although the article will be based on LNA design with a specific transistor, this general
LNA design method can be used for other transistors and applications.

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LNA design for CDMA front end

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