大家好！c8051F的ad采樣，幫我看下程序哪里的設置有問題！

ID:35884 · 發(fā)表于 2012-3-9 09:35

c51F350 部分程序：

#define SYSCLK    49000000          // SYSCLK frequency (Hz)
#define BAUDRATE    57600                // UART0 Baudrate (bps)
#define MDCLK       2457600             // Modulator Clock (Hz)

void ADC_Buffered(void)
{

unsigned int i;
  float average;
      for (i = 0; i < Sampling_times; i++)
      {
      while(!AD0INT);
      AD0INT = 0;
      ADC_OutputVal = ADC0H;
      ADC_OutputVal =ADC_OutputVal<< 16;
      ADC_OutputVal += (long)ADC0L + ((long)ADC0M << 8);
      sample_array = ADC_OutputVal;

      }

      for(i=0;i<Sampling_times;i++)
   {
      average=average+(float)sample_array;
      }

   average=average/(Sampling_times);
average=average/256/256/256;
average=average*VREF;
average=average*2;
   average=average;
ADC_VIN= (int)average;
}

void ADC0_Init (void)
{
   unsigned ADC0_decimation;
   REF0CN &= ~0x01;                      // disable internal vref
   // REF0CN |= 0x01;                      // (enable if using internal vref)

   // ADC0CN = 0x00;                      // unipolar output codes, GAIN=1
ADC0CN = 0x10;                      // Bipolar output codes, GAIN=1
   //ADC0CF = 0x00;                      // interrupts upon SINC3 filter output
                                       // and uses internal VREF
   ADC0CF = 0x04;                      // interrupts upon SINC3 filter output
                                       // and ê1ó?ía2?VREF

   ADC0CLK = (SYSCLK/MDCLK)-1;  // Ideally, MDCLK =2.457MHz
                                       // Generate MDCLK for modulator.

// program decimation rate for desired OWR
   ADC0_decimation = (unsigned long) SYSCLK/ (unsigned long) OWR /
                  (unsigned long) (ADC0CLK+1)/(unsigned long)128;
   ADC0_decimation--;

   ADC0DEC = ADC0_decimation;

   ADC0BUF = 0x00;                      // 1?±?ê?è??o3?

   ADC0MUX = 0x0b;                      // 2?·?ê?è?
                                       // AIN+ => AIN0.0
      ADC0DAC = 0x00;

      ADC0STA = 0x00;                               // AIN- => AIN0.1


// ADC0MUX = 0x08;
      ADC0MD |= 0x80;                   // ê1?ü(IDLE Mode)
}
輸入信號進行采樣調(diào)制器在頻率的MDCLK / 128.
ADC0CLK 是調(diào)制器時鐘分頻系數(shù)
為獲得最佳性能，應選擇使調(diào)制器時鐘等于2.4576 MHz（調(diào)制器采樣速率= 19.2千赫）的分頻系數(shù)
系統(tǒng)時鐘分按照公式：
MDCLK=系統(tǒng)時鐘/ (ADC0CLK + 1)

這樣的話速度應該很快啊 ~  怎么程序打出來的ADC_VIN 很慢？？？
知道大神解釋下  為什么呢？？？
怎么設置才能最快@！@

ID:35884 · 發(fā)表于 2012-3-9 09:37

Sampling_times=128的話采樣速率應該是 19200 Hz啊實驗結(jié)果目測還不到1Hz~ 啊啊啊啊啊啊

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大家好！c8051F的ad采樣，幫我看下程序哪里的設置有問題！

大家好！c8051F的ad采樣，幫我看下程序哪里的設置有問題！