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這是我掃描的文字，關(guān)于2764編程的內(nèi)容：
CAUTION:Exceeding 22V on pin 1(Vpp)will damage the
NMC2764.
Initially,and after each erasure,all bits of the NMC2764
are in the"1"state.Data is introduced by selectively pro-
gramming "Os"into the desired bit locations.Although
only"Os"will be programmed,both"1s"and"Os”can be
presented in the data word.The only way to change a“o”
to a “1”is by ultraviolet light erasure.
The NMC2764 is in the programming mode when the Vpp
input is at 21V and CE and PGM are both at TTL low. It is re-
quired that a 0.1 uF capacitor be placed across Vpp,Vcc
and ground to suppress spurious voltage transients which
may damage the device.The data to be programmed is ap-
plied 8 bits in parallel to the data output pins.The levelsre-
quired for the address and data inputs are TTL.
For programming,CE should be kept TTL low at all times
while Vpp is kept at 21V.When the address and data are
stable,a 50 ms(10 ms for the NMC2764H devices)active
low TTL program pulse is applied to PGM input.A program
pulse must be applied at each address location to be pro-
grammed.You can program any location at any time一
either individually,sequentially,or at random.The pro-
NMC2764H devices).
gram pulse has a maximum width of 55 ms(11 ms for the
Programming of multiple NMC2764s in parallel with the
ity of the programming requirements.Like inputs of the
same data can be easily accomplished due to the simplic-
paralleled NMC2764s may be connected together when
they are programmed with the same data.A low level TTL
pulse applied to the PGM input programs the paralleled
NMC2764S.
//原文件：可以去alldatasheetcn搜索即可查看
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