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*********************************************
功能:按鍵掃描+led顯
by:lsy512
當(dāng)有按鍵按下時(shí),由于按鍵的物理性質(zhì)會(huì)造成
按鍵輸出電平抖動(dòng),因此需要延時(shí)20ms,檢測(cè)按
鍵思路是:當(dāng)有按鍵按下時(shí),延時(shí)20ms,然后再
檢測(cè)是否有鍵按下,若是,則有按鍵按下,若無(wú)
則可能是不確定因素造成按鍵端有信號(hào)輸入,
在這里用了key_rst;key_rst_r;low_sw;
low_sw_r;幾個(gè)寄存器來(lái)輔助檢測(cè)是否有鍵按下,
**********************************************
module key_check(key_one,clk,rst,led_l);
input wire [7:0] key_one;
input wire clk;
input wire rst;
output wire [7:0] led_l;
reg [7:0] key_rst;
always@(posedge clk or negedge rst)
begin
if(!rst) key_rst <= 8'b11111111;
else key_rst <= key_one;
end
reg [7:0] key_rst_r;
always@(posedge clk or negedge rst)
begin
if(!rst) key_rst_r <= 8'd11111111;
else key_rst_r <= key_rst;
end
wire [7:0] key_an = key_rst & (~key_rst_r);
**************************************************
實(shí)現(xiàn)本次檢測(cè)到的按鍵信息與上一次的按鍵信息進(jìn)行與運(yùn)算
如果按鍵電平有變化,也就是說(shuō)有抖動(dòng),key_an變不會(huì)為0,
會(huì)一直在下面這個(gè)ALWAYS中一直清0,從而達(dá)到抖動(dòng)延時(shí)的
作用
**************************************************
reg [19:0] cnt;
always@(posedge clk or negedge rst)
begin
if(!rst) cnt <= 20'd0;
else if(key_an) cnt <= 20'd0;
else cnt <= cnt + 1'b1;
end
reg [7:0] low_sw;
always@(posedge clk or negedge rst)
begin
if(!rst) low_sw <= 8'b11_11_11_11;
else if(cnt == 20'hfffff)
low_sw <= key_one;
end
reg [7:0] low_sw_r;
always@(posedge clk or negedge rst)
begin
if(!rst) low_sw_r <= 8'b11_11_11_11;
else low_sw_r <= low_sw;
end
wire [7:0] led = low_sw_r[7:0] & (~low_sw[7:0]);
*************************************************
以上原理與按鍵延時(shí)相同,
*************************************************
VVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVVV
下為L(zhǎng)ED顯示代碼作為按鍵驗(yàn)證
reg [7:0] d;
always@(posedge clk or negedge rst)
begin
if(!rst)
d<=8'b11_11_11_11;
else
begin
if( led[0] ) d[0] <= ~d[0];
if( led[1] ) d[1] <= ~d[1];
if( led[2] ) d[2] <= ~d[2];
if( led[3] ) d[3] <= ~d[3];
if( led[4] ) d[4] <= ~d[4];
if( led[5] ) d[5] <= ~d[5];
if( led[6] ) d[6] <= ~d[6];
if( led[7] ) d[7] <= ~d[7];
end
end
assign led_l[0] = d[0] ? 1'b1 : 1'b0;
assign led_l[1] = d[1] ? 1'b1 : 1'b0;
assign led_l[2] = d[2] ? 1'b1 : 1'b0;
assign led_l[3] = d[3] ? 1'b1 : 1'b0;
assign led_l[4] = d[4] ? 1'b1 : 1'b0;
assign led_l[5] = d[5] ? 1'b1 : 1'b0;
assign led_l[6] = d[6] ? 1'b1 : 1'b0;
assign led_l[7] = d[7] ? 1'b1 : 1'b0;
endmodule
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